Tsakonas, A. and Dounias, G., 2005. An Architecture-Altering and Training Methodology for Neural Logic Networks: Application in the Banking Sector. In: Kurosh, M., ed. ANNIIP 2005: Proceedings of the 1st International Workshop on Artificial Neural Networks and Intelligent Information Processing. Barcelona, Spain: ICINCO, pp. 82-93.
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Official URL: http://www.icinco.org/ICINCO2005/ANNIIP.htm
Artificial neural networks have been universally acknowledged for their ability on constructing forecasting and classifying systems. Among their desirable features, it has always been the interpretation of their structure, aiming to provide further knowledge for the domain experts. A number of methodologies have been developed for this reason. One such paradigm is the neural logic networks concept. Neural logic networks have been especially designed in order to enable the interpretation of their structure into a number of simple logical rules and they can be seen as a network representation of a logical rule base. Although powerful by their definition in this context, neural logic networks have performed poorly when used in approaches that required training from data. Standard training methods, such as the back-propagation, require the network’s synapse weight altering, which destroys the network’s interpretability. The methodology in this paper overcomes these problems and proposes an architecture-altering technique, which enables the production of highly antagonistic solutions while preserving any weight-related information. The implementation involves genetic programming using a grammar-guided training approach, in order to provide arbitrarily large and connected neural logic networks. The methodology is tested in a problem from the banking sector with encouraging results.
|Item Type:||Book Section|
|Additional Information:||13-14 September 2005 - Barcelona, Spain|
|Uncontrolled Keywords:||genetic algorithms, genetic programming|
|Subjects:||Technology > Engineering > Electrical and Electronic Engineering|
|Group:||School of Design, Engineering & Computing > Smart Technology Research Centre|
|Deposited By:||Dr Athanasios Tsakonas LEFT|
|Deposited On:||25 May 2011 16:45|
|Last Modified:||07 Mar 2013 15:44|
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